Semiconducting Devices Question 75
Question: The logic behind NOR gate is that it gives
[CPMT 1999, AFMC 1999]
Options:
A) High output when both the inputs are low
B) Low output when both the inputs are low
C) High output when both the inputs are high
D) None of these
Show Answer
Answer:
Correct Answer: A
Solution:
The Boolean expression for NOR gate is $ Y=\overline{A+B} $ i.e.
if $ A=B=0 $ (Low), $ Y=\overline{0+0}=\bar{0}=1 $ (High)
