Introduction

We watch T.V. in our houses for entertainment, news, sports live etc. We use computers for multi-purposes. We use calculators, electronic watches, digital thermometers, digital glucometers to measure the amount of glucose in our body and so on. There are a number of devices which we use in our day to day life which are based on the subject matter of this chapter. The chapter is all about the branch of physics called electronics. There is no wonder to say that we are living in the age of electronics. It is prevailing in every walk of our life. The most powerful discovery of this branch of physics is the mobile technology which has become an inevitable part of our life. This chapter deals with the components of electronics such as semiconductors, diodes, $p-n$ junction, transistor, the logic gates etc.

ENERGY BANDS IN SOLIDS

In an isolated atom, electrons present in energy level but in solid, atoms are not isolated. There is interaction among each other Due to this, energy level split into different energy levels. Quantity of these different energy levels depends on the quantity of interacting atoms. Splitting of sharp and closely compact energy levels result into energy band. This is discrete in nature.

Let use see the energy bands in sodium.

When the sodium atoms are far apart, all 3 s electrons have same energy and as we begin to move them together, the energy levels begin to “split”. The situation for four sodium atoms is shown in figure. As the number of atoms is increased (may be 1()${}^{20}$ atoms), the levels become so numerous and so close that we can no longer distinguish the individual levels as shown in figure. We can regard the $N$ atoms as forming an almost continuous band of energy. Since, those levels were identified with $3s$ atomic levels of sodium, we refer to the $3s$ band.

Fig. 10.1- Energy bands in sodium metal ($G$ state)

Each band has a total of $N$ individual levels. Each level can hold $2\times (2\ell +1)$ electrons ($\ell$ is azimuthal Quantum number), so the capacity of each band is $2(2\ell +1)N$ electrons.

Figure shows a complete representation of energy bands in sodium metal. The $1s,2s$ and $2p$ bands are each full, $3s$ band is half and $3p$ band is completely empty. The $1s$ and $2s$ bands each contain $2N$ electrons and $2p$ band contain $6N$ electrons. The $3s$ band contain $N$ electron, so it is half filled. The band, which can hold $6N$ electrons is completely empty.

When we add energy to a system i.e., to sodium metal, the electron can move from filled state to empty state. In this case, the electron can move from partially full states of $3s$ band to empty states of $3s$ band by absorbing small amount of energy or move to $3p$ band by absorbing larger amount of energy.

In a solid at zero temperature, the electron settle into the available states of lowest energy. The lower energy bands will therefore be completely filled and the upper most energy band will be either filled or partially filled, depending on the number of electrons $\mathrm{\&}$ on the number of available states. The difference between conductor and insulator arises from a partially filled or a completely filled upper most energy band.

CONDUCTORS :

A conductor such as sodium, has a partially filled band (in sodium, the upper most band $3s$ is half filled). In these substance, electrons are free to move by applying an electric field, because un-occupied states are available in upper most band (as in sodium in $3s$ band only half states are completely filled and half-states are empty or un-occupied). Therefore, these electrons are mobile and can contribute to electrical & thermal conductivity. For example the energy bands of sodium metal are shown in figure. In an isolated sodium atom, the six $3p$ lowest excited state for valence electrons are about $2.1eV$ above two $3s$ G-states. But in solid sodium the $3s$ and $3p$ bands are spread out enough so that they actually overlap, forming a single band.

Fig.10.2 Origin of energy bands in sodium metals, as atoms move together the energy level spreads into bands

$(\text{For Si gap }=1.1eV,\text{ For Ge gap }=0.7eV)$

Fig. 10.3: Three types of energy band structure

(a) An insulator at absolute zero. A completely full valence band (V.B) is separated by a gap of several electron volt (may be 5 or 6 eV)from a completely empty conduction band (C.B) and electrons in the V.B can not move. At finite temperature, few electrons can reach upper band.

(b) A conductor at any temperature. There is a partially filled valence band and electrons are free to move in unoccupied states of valence band (may be called conduction band) when an electric field is applied.

(c) A semiconductor at $T=0$. A completely filled V.B is separated by a smaller gap of $1eV$ or so from an empty conduction band. At finite temperatures, substantial numbers of electron can reach the C.B, where they are free to move.

Because each sodium atom has only one valence electron but eight $3s$ and $3p$ states, that single band is only $1/8$ filled and other states are unoccupied.

INSULATORS

In these substances (such as diamond), the upper most level is completely filled i.e., no unoccupied state is available for electron to move. The nearest unoccupied states are in next band (called C.B), but this is separated from filled band (called V.B) by an energy gap of about $6eV$ [shown in figure (a)]. Hence, electron in diamond refuses to carry an electric current.

SEMICONDUCTOR

A semiconductor, has a completely filled valence band i.e., it resembles an insulator at zero temperature. However, the gap between this filled valence band and next band (C.B) is small, about $1eV$ or less [shown in figure 10.3 (b)]. Hence, electrons can easily make the transitions from one band to another at room temperature and then carry an electric current (Silicon, Germanium are semiconductors). There are two types of semiconductor.

(i) Intrinsic Semiconductor :

These semiconductors are pure materials in which the thermal vibrations of the lattice have liberated charge carriers (i.e., electrons & holes). In intrinsic semiconductor, the number of electrons are equal to the number of holes.

(ii) Extrinsic Semiconductor :

They are impure semiconductors in which minutes traces of impurity introduces mobile charge carriers [which may be +ive (holes) or-ive (electrons)] in addition to those liberated by thermal vibration. Again there are two types of Extrinsic semiconductors.

N-type semiconductor

When a pure semiconductor ($Si$ or $Ge$) is doped by pentavalent impurity $(P,As,Sb,Bi)$ then four electrons out of the five valence electrons of impurity take part, in covalent bonding, with four silicon atoms surrounding it and the fifth electron is set free. These impurity atoms which donate free $e^{-}$for conduction are called as Donor impurity $(N_D)$. Here free $e^{-}$increases very much so it is called as $n$-type semiconductor. Here impurity ions known as “Immobile Donor positive Ion”. Free $e^{-}$called as majority charge carriers and holes called as minority charge carriers.

P-type semiconductor

When a pure semiconductor ($Si$ or $Ge$) is doped by trivalent impurity ($B,Al,In,Ga$) then outer most three electrons of the valence band of impurity take part, in covalent bonding with four silicon atoms surrounding it and except one electron from semiconductor and make hole in semiconductor. These impurity atoms which accept bonded $e^{-}$from valance band are called as Acceptor impurity $(N_A)$. Here holes increases very much so it is called as p-type semiconductor here impurity ions known as “Immobile Acceptor negative Ion”. Free $e^{-}$are called as minority charge carries and holes are called as majority charge carriers.

KNOWLEDGE ENHANCER

Comparison between conductor, semiconductor and insulator :

PRINCIPLE OF THE p-n JUNCTION DIODE

If we join a piece of $n$-type to a piece of $p$-type material by appropriate method, then we obtain $p$ - $n$ junction diode. It is clear that $p$-type has more hole concentration but less concentration of electrons than $n$-type semiconductor.

Fig 10.7 : Fixed ion or immobile charge carriers

Due to this difference in concentration, density gradient is established across the junction resulting in majority carriers diffusion: Holes diffuses (+ive ions) from $p$-type to $n$-type and electrons (-ive ions) from $n$-type to $p$-type (shown in figure) and terminating their existence by recombination.

Important terms in p-n junction :

(i) Diffusion Current :

We know that due to concentration difference, holes diffuse from $p$-side to $n$-side (in ligure - 1 (a)) they move from left to right) and electron diffuse from $n$-side to $p$-side (in figure (a) they move from right to left). But electric field at junction repels the holes as they come to depletion layer and only those holes which have high kinetic energy are able to cross the potential barrier. Similarly, electric field at junction repels electrons and those having high kinetic energy cross the junction.

The electric potential of $n$-side is more +ive (or higher) than $p$-side -ive (lower). The variation of $v_1$ is shown in figure íc). So diffusion results in an electric current from $p$-side to $n$-side known as diffusion current.

(ii) Drift Current :

Due to thermal collision, some times a covalent bond is broken and electron-hole pair is created. But those electron-hole pairs are destroyed easily due to recombination. This process generation of electron-hole ( $e-h$ ) pair] occurs in the whole part of material.

But, if e-h pair is created in depletion region, the electron is quickly pushed by electric field towards $n$-side and holes towards $p$-side. As e-h pairs are continuously created in depletion region, there is a regular flow of electron towards $n$-side and holes towards $p$-side and so current flows from $n$-side to $p$-side. This current is drift current.

In steady state the magnitude of drift current is equal to diffusion current & since they are in opposite direction, hence there is no net transfer of charge at any cross-section.

This recombination produces narrow region near junction called depletion layer. Since, this region is depleted of free or mobile charge carrier and contains only immobile charge carriers, hence it is called depletion region. Due to these immobile charge carriers, a potential barrier $V_B$ is established and further diffusion is stopped and equilibrium is reached (shown by figure). The sign of $V_B$ is +ive towards the $n$-type and -ive towards $p$-type. The schematic symbol of diode and corresponding equivalance in terms of $V_B$ are shown below in figure 10.8 (a) and (b),

Fig 10.8

In figure (a) the triangle shows the direction of current. For $Si$ diode the value of $V_B$ is $0.7V$ and for Ge diode the value of $V_B$ is $0.3V$.

Forward bias :

When $p$-side of the $p-n$ junction is connected to the +ve terminal of a battery and $n$ to $-ve$ terminal, conduction takes place and the diode is said to be forward biased.

Fig. 10.9

Reverse bias :

When $p$-side of he $p$ - $n$ junction is connected to the -ve terminal of a battery and $n$-side to the $+ve$., there is no conduction and diode is said to be reverse biased.

In forward bias, the thickness of depletion layer decreases (and potential barrier height also reduces), while in reverse bias, the thickness of depletion layer increases and potential barrier also increases). In forward bias the current increases exponentially and in reverse bias, the current remains constant at very small magnitude upto break down voltage $V_0$ and after that it increases sharply without any further increase of reverse voltage (shown by figure). The effect of forward biasing and reverse biasing on potential barrier are shown in figure.

Fig.10.12 (c) : p-n junction with reverse biasing

RECTIFIER

Junction diode ( $p-n$ junction) can be used to convert the alternating current (a.c.) into direct current (d.c.). The process of conversion from a.c. to d.c. is known as rectification and the device is called rectifier. A $p-n$ junction can be used as a helf wave or full wave rectifier.

Half wave rectifier

Fig. 10.13

During the first half (positive) of the input signal. Let $S_1$ is at positive and $S_2$ is at negative potential. So, the PN junction diode $D$ is forward biased. The current flows through the load resistance $R_L$ and output voltage is obtained.

During the second half (negative) of the input signal, $S_1$ and $S_2$ would be negative and positive respectively. The PN junction diode will be reversed biased. In this case, practically no current would flow through the load resistance. So, there will be no output voltage.

Thus, corresponding to an alternating input signal, we get a unidirectional pulsating output.

Peak voltage (PIV) $V_s=V_{in}$

In half wave rectifier $PIV=$ maximum voltage across secondary coil of transformer.

Full wave rectifier :

When the diode rectifies the whole of the $AC$ wave, it is called full wave rectifier. Figure shows the experimental arrangement for using diode as full wave rectifier. The alternating signal is fed to the primary a transformer. The output signal appears across the load resistance $R_L$.

Fig. 10.14

During the positive half of the input signal :

Let $S_1$ positive and $S_2$ negative.

In this case diode $D_1$ is forward biased and $D_2$ is reverse biased. So only $D_1$ conducts and hence the flow of current in the load resistance $R_L$ is from $A$ to $B$.

During the negative half of the input signal :

Now $S_1$ is negative and $S_2$ is positive. So $D_1$ is reverse-biased and $D_2$ is forward biased. So only $D_2$ conducts and hence the current flows through the load resistance $R_L$ from A to $B$.

It is clear that whether the input signal is positive or negative, the current always flows through the load resistance in the same direction and full wave rectification is obtained.

TRANSISTOR

Transistors are three terminal (solid state) devices just like triode. It can be assumed to consist of two back to back $p-n$ junctions. In practice a junction transistor ( $p$ - $n$ - $p$ ) consists of silicon (or germanium) bar crystal in which a layer of $n$-type silicon (or $Ge$ ) is sandwiched between two layers of $p$-type silicon and we get $p$ - $n$ - $p$ transistor. Alternatively, it may consist of a layer of $p$-type between two layers of $n$-type material and we get a $n-p-n$ transister as shown by figure.

Fig. 10.15

(a) Components of transistor :

Emitter (E) :

It supplies charge carriers (electron in $n-p-n$ transistor and holes in $p-n-p$ transistor) and it has high density of impurity concentration i.e., highly doped. It is always forward biased.

Collector (C) :

It is a region on other side of base. It has maximum area out of other sections (emitter and base) of transistor to dissipate the heat. It collects the charge carriers and it is always reverse biased.

Base (B) :

It is middle region which forms the two junctions between emitter and collector. It is very lightly doped.

The schematic symbols of transistor are :

Fig.10.16

(b) Biasing of Transistor :

In proper biasing of transistor the input (i.e., base emitter junction) is always forward biased and output (i.e., collector base junction) is always reverse biased as shown in figure. [This scheme of biasing is same for all three transistor configurations; common base configuration (C.B), common emitter configuration (C.B) and common collector configuration (C.C)]

Fig.10.17

(c) Working of Transistor :

Figure shows a common base configuration of $p-n-p$ transistor. The forward biasing of emitter junction lowers the emitter base potential barrier height, whereas the reverse biasing of collector junction increases the collector-base potential barrier height. Hence, holes (majority carriers in p-type) flows through emitter to base and constitutes an emitter current $I_E$ Since, emitter is heavily doped in comparison to base, so approximately (only $5$ holes recombine with electrons in base region and constitute base current $I_B$ ) $95$ holes reach to collector and constitute collector current $I_C$. From Kirchoff’s current Law,

$I_E=I_C+I_B$ …… (1)

Equation. (1) holds true regardless of circuit configuration or transistor type (p-n-p or $n-p-n)$ that is used. The current gain of transistor is defined as ratio of collector current $I_C$ to base current $I_B$ i.e.,

$\beta =\frac{I_c}{I_B}$ …… (2)

Fig. 10.18

The value of $\beta$ lies between 10 and 100 .

Since $I_E\approx I_C$ and exactly

$I_E=\alpha I_C$ …… (3)

Whereas $\alpha$ is defined as the ratio of collector current $I_C$ to emitter current $I_E$. The value of $\alpha$ is always less than unity. In terms of $\beta ,\alpha$ is

$\alpha =\frac{\beta }{1+\beta }\Rightarrow \beta =\frac{\alpha }{1-\alpha }$ …… (4)

(d) Transistor Configuration :

There are three type of transistor configuration. We can take either terminal as input terminal and other terminal as output.

(i) Common Base Configuration (C.B) :

Here base terminal is common to both input and output terminals. The emitter terminal is taken as input.

Fig. 10.19

(ii) Common Emitter Configuration (C.E) :

Here emitter terminal is common to both input and output terminal as shown in. The base terminal is taken as input and collector is taken as output.

Fig. 10.20

(iii) Common Collector Configuration (C.C) :

Here the collector terminal is common to both input as well as output terminals as shown in figure. The base terminal is input & Emitter is output terminal.

Fig. 10.21

(e) Transistor as an Amplifier :

Amplification is the process of linearly increasing the amplitude of a signal and is one of the major properties of a transistor.

This amplification action was produced by transferring a current from a low (base emitter loop in forward biased and hence, provide low resistance path and collector base junction is reverse biased and hence gives high resistance path in common emitter configuration) to a high resistance circuit. The combination of two terms in italics results in label transits that is:

transfer + resistor $arrow$ transistor

Common-Emitter Amplifier :

Figure. 10.22, shows a basic common-emitter

amplifier circuit in which we connect a signal source $V_s$. The input

voltage loop is $V_s$, then from base to emitter through transistor to ground (common reference point) & then through $V_{BE}$ back to $V_s$. The output voltage loop consists ground, then from emitter to collector through $R_C$. The emitter is connected to ground. During a +ive half-cycle of $V_s$, the forward bias across the emitter base junction will be increased, while during - ive half-cycle of $V_s$ (signal source), the forward bias across emitter base junction will be decreased. Hence,

more electrons flow during +ive half-cycle and so we obtain more collector current and so large voltage drop across $R_C$ and less value and $V_{CE}$ In negative half cycle collector current decreases.

In the absence of input signal $v_s$, a D.C collector current $I_C$ flows in collector circuit due to forward biased battery $V_{BE}$. This is called zero signal collector current. So total collector current is

Fig. 10.22

The voltage from the collector to ground determines the output signal. When $I_C$ (during +ive half cycle) increases, $V_{CE}$ decreases and when $I_C$ decreases (during - ive half-cycle) $V_{CE}$ increase. So output voltage is ${180}^{\circ }$ out of phase with input signal in C.E amplifier :

The current gain $A_i$ is defined as

$A_i=\frac{\mathrm{\Delta }{I}_C}{\mathrm{\Delta }{I}_B}=\frac{\text{ change in load current/collector current }}{\text{ change in input current/base current }}$

The voltage gain $A_v$ is defined as,

$A_v=\frac{\mathrm{\Delta }{V}_{CE}}{\mathrm{\Delta }{V}_{BE}}=\frac{\text{ change in load voltage }}{\text{ change in input voltage }}$

The power gain is defined as, $A_p=A_i\times A_v$

Applications of transistors

Transistors can be used as an amplifier or an oscillator.

The process of increasing the amplitude of input signal without distorting its wave shape and without changing its frequency is known as amplification.

Oscillator is device which delivers a.c. output wave form of desired frequency from d.c. power even without input signal excitation.

CHECK POINT:

Why is a transistor so called?

Show Answer

SOLUTION:

The word Transistor can be treated as short form of two words ’transfer + resistor’. In a transistor, a signal is introduced in the low resistance circuit and output is taken across the high resistance circuit. Thus, a transistor helps to transfer the current from low resistance part to the high resistance part.

CHECK POINT:

The base region of a transistor is lightly doped. Explain why?

Show Answer

SOLUTION:

In a transistor, the majority carriers (holes or electrons) from emitter region move towards the collector region through base. I base is made thick and highly doped, then majority of carriers from emitter will combine with the carriers in the base and only small number of carriers will reach the collector. Thus the output or collector current will be considerably small. To get large output of collector current, base is made thin and lightly doped so that only few electron-hole combination may take place in the base region.

CHECK POINT:

Explain why the emitter is forward biased and the collector is reverse biased in a transistor?

Show Answer

SOLUTION:

In a transistor, the charge carriers move from emitter to collector. The emitter sends the charge carriers and collector collects them This can happen only if emitter is forward biased and the collector is reverse biased so that it may attract the carriers.

LAWS OF BOOLEAN ALGEBRA

Basic OR, AND, and NOT operations are given :

$\begin{array}{ccccc}\text{OR}& & \text{AND}& & \text{NOT}\\ A+0=A& & A\cdot 0=0& & A+\bar{A}=1\\ A+1=1& & A\cdot 1=A& & A\cdot \bar{A}=0\\ A+A=A& & A\cdot A=A& & \overline{\stackrel{―}{A}}\cdot A=A\end{array}$

Boolean algebra obeys commutative, associative and distributive law as given below:

Commutative laws :

A + B = B + A

A.B = B.A

Associative laws :

A + (B + C) = (A + B) + C

A.(B.C) = (A.B).C

Distributive laws :

A.(B + C) = A.B +A.C

Some other useful identities :

(i) A + AB = A

(ii) A.(A + B) = A

(iii) A + ($\bar{A}$B) = A + B

(iv) A.($\bar{A}$ + B) = A.B

(v) A + (B.C) = (A + B).(A + C)

(vi) ($\bar{A}$ + B) . (A + C) = $\bar{A}$.C + B.A + B.C

De Morgan’s theorem :

First theorem : $\overline{A+B}$ = $\bar{A}$.$\bar{B}$

Second theorem : $\overline{A.B}$ = $\bar{A}$ + $\bar{B}$

LOGIC GATES

A logic gate is a digital circuit which is based on certain logical relationship between the input and the output voltages of the circuit.

The logic gates are built using the semiconductor diodes and transistors.

Each logic gate is represented by its characteristic symbol.

The operation of a logic gate is indicated in a table, known as truth table. This table contains all possible combinations of inputs and the corresponding outputs.

A logic gate is also represented by a Boolean algebraic expression. Boolean algebra is a method of writing logical equations showing how an output depends upon the combination of inputs. Boolean algebra was invented by George Boole. There are three basic logic gates.

They are (i) AND gate (ii) OR gate (iii) NOT gate

AND Gate :

The output is high, when all inputs are high.

A	B	Y
0	0	0
0	1	0
1	0	0
1	1	1

Fig. 10.24

Boolean Expression: Y = A.B

OR gate :

Output is high even if one of the inputs is high.

Truth Table :

A	B	Y
0	0	0
0	1	1
1	0	1
1	1	1

Fig. 10.25

Boolean Expression : Y = A + B

NOT gate :

Output is not the input.

Truth Table :

A	Y
0	1
1	0

Fig. 10.26

Boolean Expression : $Y=\bar{A}$

Other logic gates

The NAND gates :

The output is high, even if all inputs are low or one input is low.

Truth Table:

A	B	Y
0	0	0
1	0	1
0	1	1
1	1	0

Fig. 10.27(a)

Boolean expression : $\overline{A.B}=Y$

The NOR gate :

The output is high, when all inputs are low.

Truth Table:

A	B	Y
0	0	1
1	0	1
0	1	1
1	1	0

Fig. 10.27(b)

Boolean expression : $\overline{A+B}=Y$

Exclusive OR Gate :

The output of a two input Exclusive OR gate is at logical 1 if one and only one input accepts logical 0 (zero)

Fig. 10.28

Boolean expression : : $Y=A+B$

Truth Table

$$ Input $$ Output

A		B		$Y=A\oplus B$
0		0		0
0		1		1
1		0		1
1		1		0

NOTE: This circuit is also called inequality comparator or detector because it produces an output only when the two inputs are different.

NAND Gate is called the building block of all digital circuits.

MISCELLANEOUS

SOLVED EXAMPLES

1. In the binary number system 100 + 1011 is equal to

(a) 1000

(b) 1011

(c) 1110

(d) 1111

Show Answer

Solution. $(100{)}_2+(1011{)}_2=(0\times 2^0+0\times 2^1+1\times 2^2)$ + ($1\times 2^0+1\times 2^1+0\times 2^2+1\times 2^3)$

= (0 + 0 + 4) + (1 + 2 + 0 + 8) = $(15{)}_{10}=(1111{)}_2$

or 0100 + 1011 = 1111

2. Identify the gate represented by the block diagram of Fig. Write the Boolean expression and truth table.

Fig. 10.29

Show Answer

Solution. Here for the input, the two NOR gates have been used as NOT gates (by joining the input terminals of NOR gate). Their outputs are jointly fed to the NOR gate. From the NOR gate I, for the input $A$, the output is $\bar{A}$. From the NOR gate II, for the input $B$, the output is $\bar{B}$. From NOR gate III, the output is given by $Y=\overline{\stackrel{―}{A}+\stackrel{―}{B}}=AA\cdot B$

Thus. Boolean expression for this combination of gate is $Y=\bar{\overline{A}}+\bar{\overline{B}}=A$.B

which is for AND gate. Thus, the combination will work as AND gate. The truth table of the combination of gates is shown in Fig.

A	B	$\overline{A}$	$\overline{B}$	Y
0	0	1	1	0
1	0	0	1	0
0	1	1	0	0
1	1	0	0	1

3. The combinations of the ‘NAND’ gates shown here in fig. 10.30 are equivalent to

Fig. 10.30

(a) an ‘OR’ gate and an ‘AND’ gate respectively

(b) an ‘AND’ gate and a ‘NOT’ gate respectively

(c) an ‘AND’ gate and an ’ $OR$ ’ gate respectively

(d) an ‘OR’ gate and a ‘NOT’ gate respectively

Show Answer

Solution. For first case, $C_1=\overline{\overline{A}\cdot \overline{B}}=(A+B)$ (by Demorgan’s Theorem)

The truth table is shown below

$A$	$B$	$\bar{A}$	$\bar{B}$	$\bar{A}\cdot \bar{B}$	$\overline{\stackrel{―}{A}\cdot \stackrel{―}{B}}$
1	0	0	1	0	1
0	1	1	0	0	1
0	0	1	1	1	0
1	1	0	0	0	1

This is truth table for $C_1=A+B$ i.e., OR gate

For second case, $C_2=\overline{\stackrel{―}{A}\cdot \stackrel{―}{B}}=A\cdot B$ i.e., AND gate.

4. The diagram of a logic circuit is given below. The output $F$ of the circuit is represented by

Fig. 10.31

(a) $W.(X+Y)$

(b) $W.(X.Y)$

(c) $W+(X.Y)$

(d) $W+(X+Y)$

Show Answer

Solution. (c) $(W+X)\cdot (W+Y)=W+(X.Y)$

5. The following configuration of gate is equivalent to

Fig. 10.32

(a) NAND

(b) $XOR$

(c) OR

(d) NOR

Show Answer

Solution. (b)

Fig. 10.33

$Y_1=A+B,Y_2=\overline{A.B}$

$Y=(A+B)\cdot \overline{AB}=A\cdot \bar{A}+A\cdot \bar{B}+B\cdot \bar{A}+B\cdot \bar{B}=0+A\cdot \bar{B}+B\cdot \bar{A}+0=A\cdot \bar{B}+B\cdot \bar{A}$

This expression is for XOR

6. Following diagram performs the logic function of

(a) XOR gate

(b) AND gate

(c) NAND gate

(d) OR gate

Show Answer

Solution. (b)

Fig. 10.35

$\begin{array}{rl}& X=\overline{AB}\\ & \therefore Y=\bar{X}=\overline{\stackrel{―}{AB}}\\ & Y=AB\text{ by Demorgan theorem }\\ & \therefore \text{ This diagram performs the function of AND gate. }\end{array}$

7. In the following circuit, the output $Y$ for all possible inputs $A$ and $B$ is expressed by the truth table.

Fig. 10.36

(a)

A	B	Y
0	0	1
0	1	1
1	0	1
1	1	0

(b)

A	B	Y
0	0	1
0	1	0
1	0	0
1	1	0

(c)

A	B	Y
0	0	0
0	1	1
1	0	1
1	1	1

(d)

A	B	Y
0	0	0
0	1	0
1	0	0
1	1	1

Show Answer

Solution.

Fig. 10.37

$Y^{\prime }=\overline{A+B}.Y=\overline{\stackrel{―}{A+B}}=A+B$.

Truth table of the given circuit is given by

A	B	Y'	Y
0	0	1	0
0	1	0	1
1	0	0	1
1	1	0	1

8. The real time variation of input signals $A$ and $B$ are as shown below. If the inputs are fed into NAND gate, then select the output signal from the following.

Fig. 10.38

Show Answer

Solution. (b) From input signals, we have,

A	B	Output NAND gate
0	0	1
1	0	1
0	0	1
1	1	0
0	0	1

The output signal is shown at $B$.

1 EXERCISE

Fill in the Blanks :

DIRECTIONS : Complete the following statements with an appropriate word / term to be filled in the blank space(s).

1. In a reverse biased $p-n$ junction diode, the p-type semiconductor is connected to …………. terminal of the cell and n-type to the terminal of the cell.

Show Answer

Answer: negative, positive

2. A group of 8 bits is called a ………….

Show Answer

Answer: byte

3. The depletion region in a semiconductor diode is formed at the ………….

Show Answer

Answer: junction

4. The process of introducing impurities in small quantities into intrinsic semiconductor is called ………….

Show Answer

Answer: doping

5. The substances whose electrical conductivity lies between conductors and insulators are called ………….

Show Answer

Answer: semiconductors

6. The conductivity of semiconductor is of the order of ………….

Show Answer

Answer: $1oh{m}^{-1}{m}^{-1}$

7. The conductivity of semiconductor increases with …………. in temperature.

Show Answer

Answer: increase

8. In semiconductors, electrical conduction is due to ………….

Show Answer

Answer: electrons and holes

9. Semiconductors have …………. temperature coefficient of resistance.

Show Answer

Answer: negative

10. The resistance of semiconductors decreases due to the addition of ………….

Show Answer

Answer: impurities

11. A semiconductor in pure form is called ………….

Show Answer

Answer: intrinsic semiconductor

12. If a p-type semiconductor is suitably joined to an n-type semiconductor, the junction is called $p-n$ junction and the device so formed is called ………….

Show Answer

Answer: diode

True / False :

DIRECTIONS : Read the following statements and write your answer as true or false.

1. Addition of either trivalent or pentavalent impurities to an intrinsic semiconductor increases its conductivity.

Show Answer

Answer: True

2. The electric current in an extrinsic semiconductor is the sum of currents due to holes and electrons.

Show Answer

Answer: True

3. In conductors, the valence and conduction bands may overlap.

Show Answer

Answer: True

4. Substances with energy gap of the order of $10eV$ are insulators.

Show Answer

Answer: True

5. The resistivity of a semiconductor increases with increase in temperature.

Show Answer

Answer: False

6. The conductivity of a semiconductor increases with increase in temperature,

Show Answer

Answer: True

7. Transistors require long warm ups than vacuum tubes.

Show Answer

Answer: False

8. Vacuum tubes are more resistant in shocks and vibrations than transistors

Show Answer

Answer: False

9. The base of a transistor is made very thin and highly doped.

Show Answer

Answer: False

10. In a transistor, both the emitter and collector are equally doped.

Show Answer

Answer: False

Very Short Answer Questions :

DIRECTIONS : Give answer in one word or one sentence.

1. What is an amplifier?

Show Answer

Answer: A circuit which strengthens weak $AC$ signals.

2. What is the effect of temperature on semiconductor?

Show Answer

Answer: Conductivity increases with increase in temperature.

3. What is a diode?

Show Answer

Answer: (i) A p-n junction. $$ (ii) Unidirectional flow of current.

4. What is an extrinsic semiconductor?

Show Answer

Answer: Impure semiconductor.

5. What is doping?

Show Answer

Answer: Addition of impurities to a pure semiconductor.

6. What is a hole?

Show Answer

Answer: Vacant site created in the VB when electrons jump from VB to CB.

7. What is a p-n junction?

Show Answer

Answer: A junction between a $p$-type and $n$-type semiconductor such that it is continuous at the boundary

8. What is rectifier?

Show Answer

Answer: A circuit which converts $AC$ into $DC$.

9. Write truth table for OR gate.

10. Write truth table for AND gate.

Long Answer Questions :

DIRECTIONS : Give answer in four to five sentences.

1. Explain the working of $p-n$ - $p$ transistor.

Show Answer

Answer: Emitter base junction is forward biased and collector base junction is reverse biased.

2. Explain with a neat circuit diagram the working of $n-p-n$ transistor as an amplifier.

Show Answer

Answer: Large output voltage drop across load resistor.

3. Explain with a neat circuit diagram the action of semiconducting diode as a half wave rectifier.

Show Answer

Answer: Diode conducts when it is forward biased.

4. What is logic gate? Explain the following gates.

$$ (i) OR gate $$ $$ (ii) AND gate $$ $$ (iii) NAND gate

5. What is a transistor? Explain its types.

Exercise 2

Multiple Choice Questions :

DIRECTIONS : This section contains multiple choice questions. Each question hus 4 choice (a), (b), (c) and (d) out of which ONLY ONE is correct.

1. $p-n$ junction is said to be forward biased, when

(a) the positive pole of the battery is joined to the $p$-semiconductor and negative pole to the n-semiconductor

(b) the positive pole of the battery is joined to the $n$-semiconductor and p-semiconductor

(c) the positive pole of the battery is connected to $n$ - semiconductor and $p$ - semiconductor

(d) a mechanical force is applied in the forward direction

Show Answer

Answer: (a) For forward biasing of $p$-n junction, the positive terminal of external battery is to be connected to $p$-semiconductor and negative terminal of battery to the $n$-semiconductor.

2. At absolute zero, $Si$ acts as

(a) non-metal

(c) insulator

(b) metal

(d) none of these

Show Answer

Answer: (c) Semiconductors are insulators at room temperature.

3. When $n$-type semiconductor is heated

(a) number of electrons increases while that of holes decreases

(b) number of holes increases while that of electrons decreases

(c) number of electrons and holes remain same

(d) number of electrons and holes increases equally.

Show Answer

Answer: (d) Due to heating, when a free electron is produced then simultaneously a hole is also produced.

4. The following truth table corresponds to the logic gate

A	B	X
0	0	0
0	1	1
1	0	1
1	1	1

(a) NAND

(b) $OR$

(c) AND

(d) XOR

Show Answer

Answer: (b) This truth table is of identity, $y=A+B$, hence. OR gate.

5. To use a transistor as an amplifier

(a) The emitter base junction is forward biased and the base collector junction is reverse biased

(b) no bias voltage is required

(c) both junctions are forward biased

(d) both junctions are reverse biased.

Show Answer

Answer: (a) To use a transistor as an amplifier the emitter base junction is forward biased while the collector base junction is reverse biased.

6. For amplification by a triode, the signal to be amplified is given to

(a) the cathode

(b) the grid

(c) the glass-envelope

(d) the anode

Show Answer

Answer: (b) The amplifying action of a triode is based on the fact that a small change in grid voltage causes a large change in plate current. The $AC$ input signal which is to be amplified is superimposed on the grid potential.

7. The part of the transistor which is heavily doped to produce large number of majority carriers is

(a) emitter

(b) base

(c) collector

(d) any of the above depending upon the nature of transistor

Show Answer

Answer: (a) The function of emitter is to supply the majority carriers. So, it is heavily doped

8. When a $p-n$ junction diode is reverse biased the flow of current across the junction is mainly due to

(a) diffusion of charges

(b) drift of charges

(c) depends on the nature of material

(d) both drift and diffusion of charges

Show Answer

Answer: (b) When $p-n$ junction is reverse biased, the flow of current is due to drifting of minority charge carriers across the junction.

9. What is the value of $A+\bar{A}$ in the Boolean algebra?

(a) 0

(b) 1

(c) $A$

(d) $\bar{A}$

Show Answer

Answer: (b) When $A=1$, then $A+\bar{A}=1+0=1$

$$ and when $A=0$, then $A+\bar{A}=0+1=1$

10. Which of the following gates corresponds to the truth table given below?

A	B	Y
1	1	0
1	0	1
0	1	1
0	0	1

(a) NAND

(b) OR

(c) AND

(d) XOR

Show Answer

Answer: (c) This truth table is of the identity, $y=\overline{A.B}$, hence, it is NAND gate.

$$ Here, the output is high even if all inputs are low or one input is low.

11. In the diagram, the input is across the terminals $A$ and $C$ and the output is across B and D. Then the output is

(a) zero

(b) same as the input

(c) full wave rectifier

(d) half-wave rectifier

Show Answer

Answer: (c) the given circuit is a circuit of full wave rectifier.

12. Which of the following, when added as an impurity, into the silicon, produces $n$-type semi-conductor?

(a) Phosphorous

(b) Aluminium

(c) Magnesium

(d) Both b and c

Show Answer

Answer: (a) Phosphorous (P) is pentavalent and silicon is tetravalent. Therefore, when silicon is doped with pentavalent impurity, it forms a n-type semiconductor.

13. When an $n-p-n$ transistor is used as an amplifier then

(a) the electrons flow from emitter to collector

(b) the holes flow from emitter to collector

(c) the electrons flow from collector to emitter

(d) the electrons flow from battery to emitter

Show Answer

Answer: (a) In an $n-p-n$ transistor, the charge carriers, are free electrons in the transistor as well as in external circuit; these electrons flow from emitter to collector.

14. When arsenic is added as an impurity to silicon, the resulting material is

(a) n-type semiconductor

(b) $p$-type semiconductor

(c) $n$-type conductor

(d) insulator

Show Answer

Answer: (a) Arsenic contains 5 electrons in its outermost shell. When Arsenic is mixed with silicon there is one electron extra in silicon crystal. Hence, such type of semi conductor is $n$-type semiconductor.

15. To obtain a p-type germanium semiconductor, it must be doped with

(a) arsenic

(b) antimony

(c) indium

(d) phosphorus

Show Answer

Answer: (c) p-type germanium semiconductor is formed when it is doped with a trivalent impurity atom.

16. The following truth table belongs to which of the following four gates?

A	B	Y
1	1	0
1	0	0
0	1	0
0	0	1

(a) NOR

(b) XOR

(c) NAND

(d) OR

Show Answer

Answer: (a) The given truth table is of (OR gate + NOT gate) $\equiv$ NOR gate

17. Which of the following gates will have an output of 1 ?

(a) $D$

(b) $A$

(c) $B$

(d) $C$

Show Answer

Answer: (d)

$$ (a) is a NAND gate so output is $\overline{1\times 1}=\overline{l}=0$

$$ (b) is a NOR gate so output is $\overline{0+1}=\overline{i}=0$

$$ (c) is a NAND gate so output is $\overline{0\times 1}=\bar{0}=1$

$$ (d) is a XOR gate so output is $0\oplus 0=0$

Following is NAND Gate

$Y=\overline{A.B}$

18. A gate has the following truth table.

$\mathbf{P}$	$\mathbf{Q}$	$\mathbf{R}$
1	1	1
1	0	0
0	1	0
0	0	0

The gate is

(a) AND

(b) NOR

(c) OR

(d) NAND

Show Answer

Answer: (a) $P,Q$ and $R$ are related as $R=P.Q$ which is relation of AND gate.

19. Which gate is represented by the following truth table ?

A	B	Y
0	0	1
1	0	1
0	1	1
1	1	0

(a) XOR

(b) NOT

(c) NAND

(d) AND

Show Answer

Answer: (c) $Y=\overline{A.B}$

$\mathbf{A}$	$\mathbf{B}$	$\mathbf{Y}$
0	0	1
0	1	1
1	0	1
1	1	0

Which is truth table of NAND gate.

20. The intrinsic semiconductor becomes an insulator at

(a) $0^{\circ }C$

(b) $0K$

(c) $300K$

(d) $-{100}^{\circ }C$

Show Answer

Answer: (a) At $0K$, motion of free electrons stop. Hence conductivity becomes zero. Therefore, at $0K$ intrinsic semiconductor becomes insulator.

21. In a $p-n$ junction

(a) The potential of the $p$ and $n$-sides becomes higher alternately

(b) The $p$-side is at higher electrical potential than the $n$-side

(c) The $n$-side is at higher electrical potential than the $p$-side

(d) Both the $p$ and $n$-sides are at the same potential

Show Answer

Answer: (b) For conduction, $p-n$ junction must be forward biased. For this $p$-side should be connected to higher potential and $n$-side to lower potential.

22. An $n-p-n$ transistor conducts when

(a) both collector and emitter are negative with respect to the base

(b) both collector and emitter are positive with respect to the base

(c) collector is positive and emitter is negative with respect to the base

(d) collector is positive and emitter is at same potential as the base

Show Answer

Answer: (c) When the collector is positive and emitter is negative w.r.t. base, it causes the forward biasing for each junction. which causes conduction of current.

23. Barrier potential of a $p-n$ junction diode does not depend on

(a) doping density

(b) diode design

(c) temperature

(d) forward bias

Show Answer

Answer: (b) Barrier potential does not depends on diode design while barrier potential depends upon temperature, doping density, and forward biasing.

24. Following diagram performs the logic function of

(a) XOR gate

(b) AND gate

(c) NAND gate

(d) OR gate

Show Answer

Answer: (b)

$X=\overline{A\cdot B}$

$\therefore Y=\bar{X}=\overline{\stackrel{―}{A.B}}$

$Y=A$. $B$ by Demorgan therorem

$\therefore$ This diagram performs the function of AND gate.

25. Reverse bias applied to a junction diode

(a) increases the minority carrier current

(b) lowers the potential barrier

(c) raises the potential barrier

(d) increases the majority carrier current

Show Answer

Answer: (c) In reverse biasing, the conduction across the $p-n$ junction does not take place due to majority carriers but takes place due to minority carriers if the voltage of extemal battery is large. The size of the depletion region increases thereby increasing the potential barrier.

26. In semiconductors, at room temperature

(a) the conduction band is completely empty

(b) the valence band is partially empty and the conduction band is partially filled

(c) the valence band is completely filled and the conduction band is partially filled

(d) the valence band is completely filled

Show Answer

Answer: (c) In semiconductros, the conduction is empty and the valence band is completely filled at $0K$. No electron from valence band can cross over to conduction band at $0K$. But at room temperature some electrons in the valence band jump over to the conduction band due to the small forbidden gap, i.e. $1eV$.

27. The output of OR gate is 1

(a) if either input is zero

(b) if both inputs are zero

(c) if either or both inputs are 1

(d) only if both inputs are 1

Show Answer

Answer: (c) Output will be one if $A$ or $B$ or both are one $Y=A+B$

28. Application of a forward bias to a $p-\mathit{n}$ junction

(a) widens the depletion zone.

(b) increases the potential difference across the depletion zone.

(c) increases the number of donors on the $n$ side.

(d) increases the electric field in the depletion zone.

Show Answer

Answer: (c)

Number of donors is more because electrons from -ve terminal of the cell pushes (enters) the $n$ side and decreases the number of uncompensated pentavalent ion due to which potential barrier is reduced. The neutralised pentavalent atom are again in position to donate electrons.

29. Zener diode is used for

(a) Amplification

(b) Rectification

(c) Stabilisation

(d) Producing oscillations in an oscillator

Show Answer

Answer: (c) At a certain reverse bias voltage, zener diode allows current to flow through it and hence, maintains the voltage supplied to any load Herice it is used for stabilisation.

30. When the temperature of a semiconductor is increased, its electrical conductivity

(a) increases

(b) decreases

(c) remains the same

(d) increases at first and then decreases

Show Answer

Answer: (a)

31. A pice of copper and another of germanium are cooled from room temperature to $80K$. The resistance of

(a) each of them increases

(b) each of them decreases

(c) copper increases and germanium decreases

(d) copper decreases and germanium increases

Show Answer

Answer: (d)

32. At absolute zero temperature, a crystal of pure germanium.

(a) behaves as perfect conductor

(b) behaves as perfect insulator

(c) contains no electron

(d) none of the above

Show Answer

Answer: (b)

33. In an intrinsic semiconductor

(a) only electrons are responsible for flow of current

(b) both holes and electrons carry current

(c) both holes and electrons carry current with electrons being majority carriers

(d) only holes are responsible for flow of current

Show Answer

Answer: (b)

34. A ordinary temperature, an increase in temperature increases the conductivity of

(a) conductor

(b) semiconductor

(c) insulator

(d) alloy

Show Answer

Answer: (b)

35. If the conductivity of a semiconductor is only due to break up of the covalent bonds due to thermal excitation, then the semiconductor is called

(a) intrinsic

(b) extrinsic

(c) donor

(d) acceptor

Show Answer

Answer: (a)

36. In a good conductor the number of electrons in the valence shell, in general, is

(a) less than 4

(b) more than 4

(c) equal to 4

(d) none of these

Show Answer

Answer: (a)

37. The mobility of conduction electrons is greater than that of holes, since electrons

(a) are lighter

(b) are negatively charged

(c) require smaller energy for moving through crystal lattice

(d) undergo smaller number of collisions

Show Answer

Answer: (c)

38. The majority of current carriers in an $n$-type semiconductor are

(a) holes

(b) electrons

(c) negative ions

(d) positive ions

Show Answer

Answer: (b)

39. A hole in $p$-type semiconductor is

(a) an excess electron

(b) a missing electron

(c) a missing atom

(d) a donor level

Show Answer

Answer: (b) In a p-type semiconductor, a hole is a missing elec tron in a covalent bond.

40. An $n$-type semiconductor is

(a) negatively charged

(b) positively charged

(c) neutral

(d) negatively or positively charged depending upon the amount of impurity

Show Answer

Answer: (c)

41. A hole in a semiconductor

(a) has zero mass

(b) has mass equal to that of proton

(c) has mass equal to that of positron

(d) is a positively charged vacancy

Show Answer

Answer: (d)

42. The conductivity of a pure semiconductor can be increased by

(a) increasing temperature

(b) mixing trivalent impurity

(c) mixing pentavalent impurity

(d) all of the above

Show Answer

Answer: (d)

43. In p-type semiconductor the majority and minority charge carriers are respectively

(a) protons and electrons

(b) electrons and protons

(c) electrons and holes

(d) holes and electrons

Show Answer

Answer: (d)

44. When boron is added as an impurity to silicon, the resulting material is

(a) n-type semiconductor

(b) n-type conductor

(c) $p$-type conductor

(d) $p$-type semiconductor

Show Answer

Answer: (d)

45. The depletion layer in the $p$-n junction is caused by

(a) drift of holes

(b) diffusion of charge carriers

(c) migration of impurity ions

(d) drift of electrons

Show Answer

Answer: (b)

46. The small currentsin reverse bias condition are due to :

(a) electrons

(b) majority charge carriers, i.e., electrons on n-side and holes on $p$-side

(c) minority charge carriers, i.e., electrons on $p$-side and holes on $n$-side.

(d) temperature

Show Answer

Answer: (c)

47. The doping of the base of a transistor is :

(a) equal to that of emitter or collector

(b) slightly more than that of emitter or collector

(c) less than that of emiiter or collector

(d) much more than that of emitter or collector

Show Answer

Answer: (c)

48. In the symbol of a transistor, the \to head points in the direction of flow of

(a) holes

(b) electrons

(c) majority carriers

(d) minority carriers

Show Answer

Answer: (a)

49. Transistors are essentially

(a) power driven devices

(b) current driven devices

(c) voltage driven devices

(d) resistance driven devices

Show Answer

Answer: (b)

50. In a transistor

(a) emitter is more highly doped than collector

(b) collector is more highly doped than emitter

(c) both are equally doped

(d) none of the above

Show Answer

Answer: (a)

51. In a transistor

(a) length of emitter is greater than that of collector

(b) length of collector is greater than that of emiter

(c) length of base is greater than that of emitter

(d) length of base is greater than that of collector

Show Answer

Answer: (b)

52. One way in which the operation of an $n-p-n$ transistor differs from that of a $p-n-p$ -

(a) the emitter junction is reverse biased in $n-p-n$.

(b) the emitter junction injects minority carriers into base region of the $p-n-p$

(c) the emitter injects holes into the base of the $p-n-p$ and electrons into the base region $n-p-n$

(d) the emitter injects holes into the base of $n-p-n$

Show Answer

Answer: (c)

53. $n-p-n$ transistors are preferred to $p-n-p$ transistors because:

(a) they have low cost

(b) they have low dissipation energy

(c) they are capable of handling large power

(d) electrons have high mobility than holes and hence high mobility of energy

Show Answer

Answer: (d)

Assertion & Reason :

DIRECTIONS : Each of these questions contains an Assertion followed by Reason. Read them carefully and answer the question on the basis of following options. You have to select the one that best describes the two statements.

(a) If both Assertion and Reason are correct and Reason is the correct explanation of Assertion.

(b) If both Assertion and Reason are correct, but Reason is not the correct explanation of Assertion.

(c) If Assertion is correct but Reason is incorrect.

(d) If Assertion is incorrect but Reason is correct.

1. Assertion : NAND or NOR gates are called digital building blocks.

Reason : The repeated use of NAND (or NOR) gates can produce all the basis or complicated gates.

Show Answer

Answer: (b) These gates are called digital building blocks because using these gates only (either NAND or NOR) we can compile all other gates also (like OR, AND, NOT, XOR)

2. Assertion : When two semi conductor of $p$ and $n$ type are brought in contact, they form $p$ - $n$ junction which act like a rectifier.

Reason : A rectifier is used to convent alternating current into direct current.

Show Answer

Answer: (c) Study of junction diode characteristics shows that the junction diode offers a low resistance path, when forward biased and high resistance path when reverse biased. This feature of the junction diode enables it to be used as a rectifier

3. Assertion : NOT gate is also called invertor circuit.

Reason : NOT gate inverts the input order.

Show Answer

Answer: (b) A NOT gate puts the input condition in the opposite order, means for high input it give low output and for low input it give high output. For this reason NOT gate is known as invertor circuit.

4. Assertion : In common base configuration, the current gain of the transistor is less than unity.

Reason : The collector terminal is reverse biased for amplification.

Show Answer

Answer: (c) Assertion is true but reason is false.

The common base configuration of $n-p-n$ transistor is used for voltage amplification. The current amplification is very small.

Assertion is true.

the collector is reverse biased for voltage amplification. The reason given has not mentioned that it is voltage amplification. The reason is therefore, incomplete by itself. It is wrong.

5. Assertion : A p-n junction with reverse bias can be used as a photo-diode to measure light intensity.

Reason : In a reverse bias condition the current is small but is more sensitive to changes in incident light intensity.

Show Answer

Answer: (a)

HOTS Subjective Questions :

DIRECTIONS : Answer the following questions.

1. Frequency of input voltage of a half-wave rectfier is $50Hz$. What will be the frequency of the output voltage.

Show Answer

Answer: $50Hz$

2. How is a sample of $n$-type semiconductor electrically neutral though it has an excess of negative charge carriers?

Show Answer

Answer: An $n$-type semiconductor is obtained by doping pure $Si$ or Ge crystal with pentavalent impurity. As the impurity atoms enter into the configuration of the Si crystal, its four electrons take part in covalent bonding, while the fifth electron is left free.

But each atom of the semiconductor as a whole is electrically neutral, the $n$-type Ge crystal is electrically neutral.

3. Using a suitable combination from a NOR, an OR and a NOT gate, draw circuits to obtain the truth table given below:

A	B	Y
0	0	0
0	1	0
1	0	1
1	1	0

(i)

A	B	Y
0	0	1
0	1	1
1	0	0
1	1	1

(ii)

Show Answer

Answer: (i) Circuit diagram for truth table (i)

$A$	$B$	$\bar{A}$	$\bar{A}+B$	$Y=\overline{\stackrel{―}{A}+B}$
$\mathbf{0}$	0	1	1	0
0	1	1	1	0
1	0	0	0	1
1	1	0	1	0

(ii) Circuit diagram for truth table (ii)

$A$	$B$	$\bar{A}$	$Y=\bar{A}+B$
0	0	1	1
0	1	1	1
1	0	0	0
1	1	0	1

4. Give reasons :

(i) Why common emitter circuit is used for making an oscillator.

(ii) Why common emitter amplifier is preferred over common base amplifier.

Show Answer

Answer: (i) For positive feedback

(ii) More gain (current, voltage and power)

5. The output of two NOT gates is made input for NOR gate. Name the new logic gate obtained and write down its truth table.

Show Answer

Answer: $y=\overline{\overrightarrow{A}+\overrightarrow{B}}=\overline{\stackrel{―}{A}}\cdot \overline{\stackrel{―}{B}}=A\cdot B$

Hence, AND gate is formed.

$A$	$B$	$Y$
0	0	0
0	1	0
1	0	0
1	1	1

6. Two identical p-n junctions may be connected in series with a battery in three different ways as shown in the circuit diagrams. In which circuit diagrm will the potential drop across the p-n junctions be equal?

7. What is the resistance offered by the following circuit if the current flows from

(1) $A$ to $B$ and $$

(2) $B$ to $A$ ?

Assume the diodes to be ideal.

What is the $PD$ across $D_1$ and $D_2$, when they were nonconducting, i.e., when they are reverse biased, if $7V$ is applied across $AB$ ?

8. In the following circuit diagram, if the diode is ideal, what are the values recorded by the ammeter and the voltmeter?

9. What is the resistance offered by the following circuit if current flows from

(1) $A$ to $B$ and $$ (2) $B$ to $A$ ?

(Assume diode to be an ideal diode)

10. An AC voltage is applied to the diode, as shown in the figure below. Draw the graph of output voltage versue time. Explain the action of the diode.

Is the output voltage across $R$ a $DC$ voltage? Explain.

11. In the following circuit, explain the flow of current through resistor $R$. Can we use the circuit to convert $AC$ to $DC$ ? Explain.